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ICX252AQ
Diagonal 8.933mm (Type 1/1.8) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras
Description The ICX252AQ is a diagonal 8.933mm (Type 1/1.8) interline CCD solid-state image sensor with a square pixel array and 3.24M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/4.28 second. Also, number of vertical pixels decimation allows output of 30 frames per second in high frame rate readout mode. R, G, B primary color mosaic filters are used as the color filters, and at the same time high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology. This chip is suitable for applications such as electronic still cameras, etc. Features * Supports frame readout * High horizontal and vertical resolution * Supports high frame rate readout mode: 30 frames/s, AF1 mode: 60 frames/s, 50 frames/s, AF2 mode: 120 frames/s, 100 frames/s * Square pixel * Horizontal drive frequency: 18MHz * No voltage adjustments (reset gate and substrate bias are not adjusted.) * R, G, B primary color mosaic filters on chip * High sensitivity, low dark current * Continuous variable-speed shutter * Excellent anti-blooming characteristics * Exit pupil distance recommended range -20 to -100mm * 20-pin high-precision plastic package Device Structure * Interline CCD image sensor * Total number of pixels: * Number of effective pixels: * Number of active pixels: * Number of recommended record pixels: * Chip size: * Unit cell size: * Optical black: * Number of dummy bits: * Substrate material: 20 pin DIP (Plastic)
Pin 1 2
V
8 4 Pin 11 H 48
Optical black position (Top View)
2140 (H) x 1560 (V) approx. 3.34M pixels 2088 (H) x 1550 (V) approx. 3.24M pixels 2080 (H) x 1542 (V) approx. 3.21M pixels diagonal 8.933mm 2048 (H) x 1536 (V) approx. 3.15M pixels diagonal 8.832mm aspect ratio 4:3 8.10mm (H) x 6.64mm (V) 3.45m (H) x 3.45m (V) Horizontal (H) direction: Front 4 pixels, rear 48 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels Horizontal 28 Vertical 1 (even fields only) Silicon
Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing
newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E00109-PS
ICX252AQ
VOUT
GND
TEST
TEST
Block Diagram and Pin Configuration (Top View)
V1B
V1A
V3B
V3A
2
B Gr B Gr B Gr
10
9
8
7
6
5
V2
4
3
Gb
B Gr B Gr B Gr
Gb R Gb R Gb R
Vertical register
R Gb R Gb R
Horizontal register Note) : Photo sensor
11
12
13
14
15
16
17
18
19
20
Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 Symbol V4 V3A V3B V2 V1A V1B TEST TEST GND VOUT Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Test pin1 Test pin1 GND Signal output Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol VDD RG H2 H1 GND SUB CSUB VL H1 H2 Description Supply voltage Reset gate clock Horizontal register transfer clock Horizontal register transfer clock GND Substrate clock Substrate bias2 Protective transistor bias Horizontal register transfer clock Horizontal register transfer clock
1 Leave this pin open. 2 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of 0.1F.
SUB
-2-
CSUB
GND
RG
VDD
H1
H2
H1
H2
VL
V4
1 Note)
ICX252AQ
Absolute Maximum Ratings Item VDD, VOUT, RG - SUB V1A, V1B, V3A, V3B - SUB Against SUB V2, V4, VL - SUB H1, H2, GND - SUB CSUB - SUB VDD, VOUT, RG, CSUB - GND Against SUB V1A, V1B, V2, V3A, V3B, V4 - GND H1, H2 - GND Against VL V1A, V1B, V3A, V3B - VL V2, V4, H1, H2, GND - VL Voltage difference between vertical clock input pins Between input clock pins Storage temperature Guaranteed temperature of performance Operating temperature 1 +24V (Max.) when clock width < 10s, clock duty factor < 0.1%. +16V (Max.) is guaranteed for turning on or off power supply. H1 - H2 H1, H2 - V4 Ratings -40 to +12 -50 to +15 -50 to +0.3 -40 to +0.3 -25 to -0.3 to +22 -10 to +18 -10 to +6.5 -0.3 to +28 -0.3 to +15 to +15 -6.5 to +6.5 -10 to +16 -30 to +80 -10 to +60 -10 to +75 Unit Remarks V V V V V V V V V V V V V C C C 1
-3-
ICX252AQ
Bias Conditions Item Supply voltage Protective transistor bias Substrate clock Reset gate clock Symbol VDD VL SUB RG Min. 14.55 Typ. 15.0 1 2 2 Max. 15.45 Unit V Remarks
1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same voltage as the VL power supply for the V driver should be used. 2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage VVH3 - VVH VVH4 - VVH VVHH VVHL VVLH VVLL VH Horizontal transfer clock voltage VHL VCR VRG Reset gate clock voltage VRGLH - VRGLL VRGL - VRGLm Substrate clock voltage VSUB 21.5 22.5 4.75 -0.05 0.8 3.0 5.0 0 2.5 3.3 5.25 0.4 0.5 23.5 Min. 14.55 -0.05 -0.2 -8.0 6.8 -0.25 -0.25 Typ. 15.0 0 0 -7.5 7.5 Max. 15.45 0.05 0.05 -7.0 8.05 0.1 0.1 0.6 0.9 0.9 0.5 5.25 0.05 Unit V V V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 Low-level coupling Low-level coupling Cross-point voltage High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) VVH = (VVH1 + VVH2)/2 Remarks Symbol IDD Min. 2.0 Typ. 4.5 Max. 7.0 Unit mA Remarks
-4-
ICX252AQ
Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Symbol CV1A, CV3A CV1B, CV3B CV2, CV4 CV1A2, CV3A4 CV1B2, CV3B4 CV23A, CV41A Capacitance between vertical transfer clocks CV23B, CV41B CV1A3A CV1B3B CV1A3B, CV1B3A CV24 CV1A1B, CV3A3B Capacitance between horizontal transfer CH1, CH2 clock and GND Capacitance between horizontal transfer CHH clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor
V2 R2 CV1A3A CV23B CV23A V3A R3A H1 CV1B2 CV1A CV1A1B CV1B3A CV1B CV41A V1B R1B CV4 CV41B RGND CV1B3B R4 CV2 CV3A CV3A3B CV1A3B CV3B CV3A4 R3B V3B CV3B4 RH H1 CHH RH H2
Min.
Typ. 1500 5600 2700 390 470 120 180 39 220 62 75 68 36.5 88.5 8 1000 62 18 15
Max.
Unit pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF
Remarks
CRG CSUB R1A, R1B, R2, R3A, R3B, R4 RGND RH
CV24 V1A R1A CV1A2
RH
RH H2
CH1
CH2
V4
Vertical transfer clock equivalent circuit -5-
Horizontal transfer clock equivalent circuit
ICX252AQ
Drive Clock Waveform Conditions (1) Readout clock waveform
100% 90%
II II
M VVT 10% 0% tr twh tf 0V M 2
(2) Vertical transfer clock waveform
V1A, V1B V3A, V3B
VVH1
VVHH
VVH VVHL
VVHH VVHH VVHL VVHL VVH3 VVHH VVHL
VVH
VVL1
VVLH
VVL3
VVLH VVLL VVL
VVL
VVLL
V2 VVHH VVHH
V4 VVHH VVHH
VVH VVHL
VVH
VVH2 VVHL
VVHL VVH4
VVHL
VVL2
VVLH
VVLH
VVLL VVL VVL4
VVLL VVL
VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) -6-
ICX252AQ
(3) Horizontal transfer clock waveform
tr H2 90% VCR VH 10% H1 two VH 2 twh tf
twl
VHL
Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two. (4) Reset gate clock waveform
tr twh tf
RG waveform
VRGH
twl VRG Point A VRGLH VRGLL VRGLm VRGL
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH - VRGL Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
100% 90%
M VSUB 10% 0% M 2 tf
VSUB
tr
twh
(A bias generated within the CCD)
-7-
ICX252AQ
Clock Switching Characteristics (Horizontal drive frequency: 18MHz) Item Readout clock Vertical transfer clock Horizontal transfer clock During imaging Symbol VT V1A, V1B, V2, V3A, V3B, V4 H1 H2 14 19.5 14 19.5 6.67 5.56 7 10 37 14 19.5 14 19.5 8.5 14 8.5 14 0.01 0.01 4 0.5 twh twl tr tf Unit Remarks s During readout When using CXD3400N
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.63 2.83 0.5 0.5
15
250 ns 8.5 14 8.5 14 0.01 0.01 5 0.5 s ns s
ns tf tr - 2ns
During H1 parallel-serial H2 conversion RG SUB
Reset gate clock Substrate clock
1.7 3.06
During drain charge
Item
two Symbol Min. Typ. Max. 12 19.5
Unit ns
Remarks
Horizontal transfer clock H1, H2
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1.0 B 0.8 G R
Relative Response
0.6
0.4
0.2
0 400
450
500
550 Wave Length [nm]
600
650
700
-8-
ICX252AQ
Image Sensor Characteristics (Horizontal drive frequency: 18MHz) Item G sensitivity Sensitivity comparison Saturation signal Smear R B Symbol Sg Rr Rb Vsat Sm Min. 220 0.3 0.35 450 -89.1 -79.6 -81.2 -71.6 20 25 12 6 3.8 3.8 3.8 0.5 Typ. 270 0.45 0.50 0.6 0.65 mV dB Max. Unit mV Measurement method 1 1 1 2 3 Ta = 60C,1
(Ta = 25C) Remarks 1/30s accumulation
Frame readout mode,2 High frame rate readout mode Zone 0 and I Zone 0 to II' Ta = 60C, 4.28 frame/s Ta = 60C, 4.28 frame/s,3
Video signal shading Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag
SHg Vdt Vdt Lcg Lcr Lcb Lag
% mV mV % % % %
4 5 6 7 7 7 8
1 The saturation signal level is 450mV or more by performing pull-down CSUB pin at 1.3k resistor. For high frame rate readout mode, it is 800mV. 2 After closing the mechanical shutter, the smear can be reduced to below the detection limit by performing vertical register sweep operation. 3 Excludes vertical dark signal shading caused by vertical register high-speed transfer. Zone Definition of Video Signal Shading
2088 (H) 4 4 4 H 8 V 10 H 8
1550 (V)
Zone 0, I Zone II, II' V 10
4
Ignored region Effective pixel region
Measurement System
CCD signal output [A]
CCD
C.D.S
AMP
S/H
Gr/Gb channel signal output [B]
S/H
R/B channel signal output [C]
Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1. -9-
ICX252AQ
Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the frame readout mode is used. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb channel signal output or the R/B channel signal output of the measurement system.
Color coding of this image sensor & Readout
B2
Gb R
B Gr B Gr
Gb R Gb R
B Gr B Gr A1 A2
B1
Gb R
The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. For frame readout, the A1 and A2 lines are output as signals in the A field, and the B1 and B2 lines in the B field.
Horizontal register Color Coding Diagram
- 10 -
ICX252AQ
Readout modes 1. Readout modes list The following readout modes are possible by driving the image sensor at the timing specifications noted in this Data Sheet. Mode name Frame readout mode High frame rate readout mode AF1 mode NTSC mode PAL mode NTSC mode PAL mode NTSC mode PAL mode NTSC mode PAL mode Frame rate 4.28 frame/s 4.16 frame/s 30 frame/s 25 frame/s 60 frame/s 50 frame/s 120 frame/s 100 frame/s Number of output effective lines 1550 (Odd 775, Even 775) 1550 (Odd 775, Even 775) 258 258 See Page.12 See Page.12 See Page.12 See Page.12
AF2 mode
2. Frame readout mode, high frame rate readout mode Frame readout mode 1st field
13 12 11 10 9 8 7 6 5 4 3 2 VOUT 1 R Gb R Gb R Gb R Gb R Gb R Gb R Gr B Gr B Gr B Gr B Gr B Gr B Gr VOUT 13 12 11 10 9 8 7 6 5 4 3 2 1
High frame rate readout mode 2nd field
R Gb R Gb R Gb R Gb R Gb R Gb R Gr B Gr B Gr B Gr B Gr B Gr B Gr VOUT 13 12 11 10 9 8 7 6 5 4 3 2 1 R Gb R Gb R Gb R Gb R Gb R Gb R Gr B Gr B Gr B Gr B Gr B Gr B Gr
Note) Blacked out portions in the diagram indicate pixels which are not read out. 1. Frame readout mode In this mode, all pixel signals are divided into two fields and output. All pixel signals are read out independently, making this mode suitable for high resolution image capturing. 2. High frame rate readout mode Output is performed at 30 frames per second by reading out 4 pixels for every 12 vertical pixels and adding 2 pixels in the horizontal CCD. The number of output lines is 258 lines. This readout mode emphasizes processing speed over vertical resolution. - 11 -
ICX252AQ
3. AF1 mode, AF2 mode The AF modes increase the frame rate by cutting out a portion of the picture through high-speed elimination of the top and bottom of the picture in high frame rate readout mode. AF1 allows 1/60s and 1/50s output, and AF2 allows 1/120s and 1/100s output, so these modes are effective for raising the auto focus (AF) speed. In addition, the cut-out can begin from an optional line by controlling the number of frame shift lines that sweep the top of the picture. The relation between the number of frame shift lines, the output start position and number of output lines is shown in the table below.
Top frame shift region (Number of shift lines = 0 to 255)
Cut-out region
Number of effective lines in high frame rate readout mode 258
Bottom high-speed sweep region
AF1 mode NTSC Frame rate Output start position on timing chart Number of frame shift lines Output lines1 1/60s 26H PAL 1/50s 26H i = 0 to 255 i + 3 to i + 108 i + 3 to i + 134 NTSC
AF2 mode PAL 1/100s 30H
1/120s 30H
i + 3 to i + 38
i + 3 to i + 47
1 Output line is Up to 258 lines. The i + 1 and i + 2 line signals may be disrupted by elimination of the picture top, so these lines should not be used. For example, if the picture top is eliminated with i = 100 in AF1 mode (NTSC), lines 103 to 208 in high frame rate readout mode are output from 26H of the timing chart. If the picture top is eliminated with i = 160 in AF1 mode (NTSC), lines 163 to 258 in high frame rate readout mode are output from 26H of the timing chart.
- 12 -
ICX252AQ
Definition of standard imaging conditions 1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 3) Standard imaging condition III: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens (exit pupil distance -33mm) with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G sensitivity, sensitivity comparison Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screen, and substitute the values into the following formulas. VG = (VGr + VGb)/2 Sg = VG x 100/30 [mV] Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = 20 x log Vsm /
(
Gra + Gba + Ra + Ba 1 1 x x 4 10 500
) [dB] (1/10V method conversion value)
4. Video signal shading Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula. SHg = (Grmax - Grmin)/150 x 100 [%] - 13 -
ICX252AQ
5. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. Dark signal shading After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 7. Line crawl Set to standard imaging condition II. Adjusting the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G and B filters and measure the difference between G signal lines (Glr, Glg, Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = Gli x 100 [%] (i = r, g, b) Gai 8. Lag Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) x 100 [%]
VD
V1A/V1B
Strobe light timing
Gr signal output 150mV
Vlag (leg)
Output
- 14 -
ICX252AQ
Drive Circuit
3.3V
-7.5V
15V
0.1 1 XSUB XV3 XSG3B XSG3A XV1 XSG1B XSG1A XV4 XV2 2 3 4 5 CXD3400N 6 7 8 9 10 15 14 13 12 11 20 19 18 17 16
100k 1/35V
0.1
0.1
47 2SK1875 1 2 3 4 5 6 7 8 9 10 CCD OUT 1.8k
V4
V3B
V1A
V1B
V2
ICX252 (BOTTOM VIEW) VR1 (1.3k)
TEST
TEST
VOUT
GND
V3A
CSUB
SUB
3.3/20V
GND
RG
H1
H2
VSUB Cont.
H1
H2
VL
VDD
0.01
20 19 18 17 16 15 14 13 12 11
H2 H1 RG 0.1 0.1 1M Substrate bias control signal VSUB Cont. Substrate bias SUB pin voltage 0.1 3.3/16V
Mechanical shutter mode tf 10ms tr 2ms
GND Internally generated value VSUB
2200p
Notes) Substrate bias control 1. The saturation signal level decreases when exposure is performed using the mechanical shutter, so control the substrate bias. 2. A saturation signal level equivalent to that for continuous exposure can be assured by connecting a 1.3k grounding resistor to the CCD CSUB pin. Drive timing precautions 1. Blooming occurs in modes (high frame rate readout, etc.) that do not use the mechanical shutter, so do not ground the connected 1.3k resistor. 2. tf is slow, so the internally generated voltage VSUB may not drop to a sufficiently low level if the substrate bias control signal is not set to high level 40ms before entering the exposure period and the 1.3k resistor connected to the CSUB pin is not grounded. 3. The blooming signal generated during exposure in mechanical shutter mode is swept by providing one field or more of idle transfer through vertical register high-speed sweep transfer from the time the mechanical shutter closes until sensor readout is performed. However, note that the VL potential and the SUB pin DC voltage sag at this time. - 15 -
Drive Timing Chart (Vertical Sequence)
Exposure operation
High Frame Rate Readout Mode Frame Readout Mode/Electronic Shutter Normal Operation
Frame readout mode High frame rate readout mode
Act.
High frame rate readout mode
VD
V1A
V1B
V2
V3A
- 16 -
B B C OPEN CLOSE C output signal (ODD)
V3B
V4 D E
SUB
A
TRG
Mechanical shutter
OPEN
VSUB Cont.
CCD OUT
A output signal A output signal B output signal B output signal
C output signal (EVEN)
Output after frame readout D output signal E output signal
ICX252AQ
Note) The B output signal contains a blooming component and should therefore not be used.
Drive Timing Chart (Vertical Sync)
NTSC/PAL Frame Readout Mode NTSC: 4.28 frame/s, PAL: 4.17 frame/s
All pixel output period
Exposure period
VD
HD
9 10 27 30 31 35 928 929 946 948 950 919 920 810 954 1729 1838 1 1755 980 1890 1
NTSC
9 10
27
30 31
35
810
972
945 946
953 954
"c" "a" "b"
"c"
V1A/B
V2
V3A/B
1 3 5 7 1 3 5 7 9 11
2 4 6 8 2 4 6 8 10 12
CCD OUT
ICX252AQ
Note) 2288fH, However, 919H and 1828H in NTSC mode are 1716 clk, and 944H, 945H, 1889H and 1890H in PAL mode are 1208 clk.
1547 1549
1548 1550
- 17 -
V4
SUB
TRG
Mechanical shutter
OPEN
CLOSE
974
976
PAL
1
1
OPEN
VSUB Cont.
Drive Timing Chart (Readout)
NTSC/PAL Frame Readout Mode
"a" Enlarged
1 52 172 172
NTSC: #30 PAL : #30
NTSC: #31 PAL : #31
H1
2288
1100 1190 1160
V1A/B
V2
V3A/B
1130
V4
"b" Enlarged
172
2288 1
52
1
52
1
52
2288
211
V1A/B
1280
V2
1250 181
1310
V3A/B
241
V4
2288
172
- 18 -
NTSC: #948 PAL : #974
NTSC: #949 PAL : #975
H1
ICX252AQ
Drive Timing Chart (High-speed Sweep Operation)
NTSC/PAL Frame Readout Mode
"c" Enlarged
61776 clk = 27 lines
52
52
HD
1
V1A/B
V2
- 19 -
19 10 19 10
V3A/B
V4
19 10 19 10 19 10 19 10 19 10 19 10 19 10 19 10
#1
#2
#3
#4
#1038
ICX252AQ
Drive Timing Chart (Horizontal Sync)
NTSC/PAL Frame Readout Mode
Ignored pixel 4 bits
4
209
Ignored pixel 4 bits
2288
1 5
52
CLK
1
120
1
172
RG
SHP
SHD
18 1 1 40 62
V1A/B
48 1
1
1 1 1 76 1 44 49 24
47
V2
1
- 20 -
1 67 1 15 38 1 18 1 68 34
V3A/B
V4
1
H1
H2
SUB
1
28
200
ICX252AQ
Drive Timing Chart (Vertical Sync)
NTSC/PAL High Frame Rate Readout Mode NTSC: 30 frame/s, PAL: 25 frame/s
VD
HD
9 10 15 9 10 255 260 9 10 263 1 15 15
260
255
263 1
NTSC
15
260
315 1
255
255
260
315 1
PAL
"d"
"d"
V1A
V1B
1527 1534 1539 1546
6 3 10 15 22 27 30
1527 1534 1539 1546
1525 1532 1537 1544 1549
4 1 8 13 20 25 28
ICX252AQ
Note) 2288fH, However, 263H in NTSC mode is 1144 clk, and 315H in PAL mode is 1568 clk.
1525 1532 1537 1544 1549
CCD OUT
4 1 8 13 20 25 28
6 3 10 15 22 27 30
- 21 -
V2
V3A
V3B
V4
9 10
Drive Timing Chart (Readout)
NTSC/PAL High Frame Rate Readout Mode
"d" Enlarged
#2
1 52 172
NTSC 2288 PAL 2288 1250 1040 1340 1270 1400 1310
#1
172
H1
1
NTSC 1144 PAL 1568
V1A
V1B
52
1130 1430
1220
1370
V2
- 22 -
1100 1160 1010 1190 1070 1280
V3A
V3B
V4
ICX252AQ
Drive Timing Chart (Horizontal Sync)
NTSC/PAL High Frame Rate Readout Mode, AF1 Mode, AF2 Mode
Ignored pixel 4 bits
200
Ignored pixel 4 bits
4
209
2288
1 5
52
CLK
1
120
1
48
1
172
RG
SHP
SHD
1 1 1 1 13 1 13 23 1 13 23 30
15
V1A/B
1 14 1 1 1 1 1 13 1 13 25 23 1 23 13 1 13 23 13 1 1 1 21 23 23
V2
1
- 23 -
1 1 1 13 1 16 23 9 1 13 23 1 23 1 58 1 39 23
V3A/B
V4
1
H1
H2
SUB
1
28
ICX252AQ
Drive Timing Chart (Vertical Sync)
NTSC/PAL AF1 Mode NTSC: 60 frame/s, PAL: 50 frame/s
VD
HD
9 10 23 26 9 10 9 10 23 26 9 10 15 15
NTSC
158 132 1 1
"f" "d"
Frame shift period 13H
"e" "f" "d"
High-speed sweep period 7H (138 lines)
158 132 1 1
PAL
"e"
V1A
V1B
6
CCD OUT
4
ICX252AQ
Note) 2288fH, However, 182H in NTSC mode is 572 clk, and 158H in PAL mode is 784 clk.
4
6
- 24 -
AF mode output signal
V2
V3A
V3B
V4
Drive Timing Chart (Vertical Sync)
NTSC/PAL AF2 Mode NTSC: 120 frame/s, PAL: 100 frame/s
VD
HD
27 30 9 10 9 10 66 1 27 9 10 9 10 30 79 1 27 27
NTSC
PAL
79 1
66 1
"f" "e" "d"
Frame shift period 13H
High-speed sweep period 7H (208 lines)
"f"
"d"
"e"
V1A
V1B
6
CCD OUT
4
ICX252AQ
Note) 2288fH, However, 66H in NTSC mode is 1430 clk, and 79H in PAL mode is 1356 clk.
4
6
- 25 -
AF mode output line
V2
V3A
V3B
V4
Drive Timing Chart (High-speed Frame Shift Operation)
NTSC/PAL AF1 Mode, AF2 Mode
"e" Enlarged
13H
52
HD
52
1
57
V1A/B
13 23 13 23 13 23
66
V2
13 23 13 23 13 23
- 26 -
#2 i = 0 to 255
V3A/B
13 23 13 23 13 23
V4
61
13 23 13 23 13 23
#1
ICX252AQ
Drive Timing Chart (High-speed Sweep Operation)
NTSC/PAL AF1 Mode, AF2 Mode
" f " Enlarged
AF1 mode: 7H, AF2 mode: 11H
52
HD
52
1
57
V1A/B
13 23 13 23 13 23
66
V2
13 23 13 23 13 23
- 27 -
#2 AF1 mode: #138 AF2 mode: #208
V3A/B
13 23 13 23 13 23
V4
61
13 23 13 23 13 23
#1
ICX252AQ
ICX252AQ
Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero-cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operations as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)
Cover glass
50N Plastic package Compressive strength
50N
1.2Nm Torsional strength
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. - 28 -
ICX252AQ
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the poweroff mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) Brown stains may be seen on the bottom or side of the package. But this does not affect the CCD characteristics.
- 29 -
Package Outline
Unit: mm
20pin DIP
0 to 9
6.9 D 11 11 20 A
~
2.5
20
1.7
C 1.7
10.9
12.2
B 1.7
2.5
9.0
~
6.0
V 10 1
0.5
0.8 13.8 0.1 B'
0.8
0.5
2.9 0.15
1.27 0.3 0.3
M
2.4
3.5 0.3
- 30 -
10.0 2.5
1. "A" is the center of the effective image area. 2. The two points "B" of the package are the horizontal reference. The point "B'" of the package is the vertical reference. 3. The bottom "C" of the package, and the top of the cover glass "D" are the height reference. 4. The center of the effective image area relative to "B" and "B'" is (H, V) = (6.9, 6.0) 0.15mm. 5. The rotation angle of the effective image area relative to H and V is 1. 6. The height from the bottom "C" to the effective image area is 1.41 0.10mm. The height from the top of the cover glass "D" to the effective image area is 1.49 0.15mm. 7. The tilt of the effective image area relative to the bottom "C" is less than 50m. The tilt of the effective image area relative to the top "D" of the cover glass is less than 50m. 8. The thickness of the cover glass is 0.5mm, and the refractive index is 1.5.
ICX252AQ
~
PACKAGE STRUCTURE
PACKAGE MATERIAL
Plastic
LEAD TREATMENT
GOLD PLATING
LEAD MATERIAL
42 ALLOY
PACKAGE MASS
0.95g
DRAWING NUMBER
AS-B6-01(E)
9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing.
0.25
1 12.7 10
1.7
H
12.0 0.1

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